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EVS-EN 61188-7:2017

Printed boards and printed board assemblies - Design and use - Part 7: Electronic component zero orientation for CAD library construction

General information

Valid from 05.07.2017
Base Documents
IEC 61188-7:2017; EN 61188-7:2017
ICS Groups
31.180 Printed circuits and boards
Directives or regulations
None

Standard history

Status
Date
Type
Name
05.07.2017
Main
EVS-EN 61188-7:2017
04.09.2009
Main
EVS-EN 61188-7:2009
This part of IEC 61188 establishes a consistent technique for the description of electronic component orientation, and their land pattern geometries. This facilitates and encourages a common data capture and transfer methodology amongst and between global trading partners.

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English (PDF 333 KB)

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Standards designation

EVS Estonian standard
EN European standard (published by an CEN or CENELEC)
EN ISO International standard adopted as an European standard
ISO International Organization for Standardization’s standard
IEC International Electrotechnical Commission’s standard
HD CENELEC’s harmonisation document
   
EVS-EN European standard implemented in Estonia
EVS-EN ISO International standard adopted in Europe and implemented in Estonia
EVS-EN ISO/IEC International standard/International electrotechnical standard adopted in Europe and implemented in Estonia
EVS-IEC International electrotechnical standard implemented in Estonia
EVS-ISO International standard implemented in Estonia
   
A, AMD amedment
+A a full standard plus the amendment
/A only amendment
COR, AC corrigendum
+COR a full standard plus the corrigendum
NA national annex
+NA a full standard plus the national annex
/NA only national annex
TS technical specification
TR technical report
CWA agreement, developed by a CEN or CENELEC
prEVS-EN (etc) draft standard
   
et the standard is in Estonian only
en the standard is in English only
et-en the standard is in Parallel text Estonian-English